 | From the Series از مجموعه : Compiler and Microarchitectural Techniques for Leakage Power Reduction
Produced by تهيه كننده : Microsoft Research
Date تاريخ : 2007-09-14
Compiler and Microarchitectural Techniques for Leakage Power Reductiondownload دانلود ,ويدئو و اسلايد Video & Slide , از گروه Computer Sience & Engineering كامپيوتر و مهندسی كتابخانه اينترنتي دانش گستران جوان You Research Description توضيح : Leakage power has become an increasingly important issue in processor hardware and software design. With the main component of leakage, the sub-threshold current, exponentially increasing with decreasing device dimensions, leakage commands an ever increasing share in the processor power consumption. In 65 nm and below technologies, leakage accounts for 30-40% of processor power. While there are several process technology and circuit-level solutions to reduce leakage in processors, the research on reducing leakage at the microarchitecture and compiler stage is still nascent. In this talk, I will present some techniques that will help reduce leakage in processors fabricated in sub nanometer technologies.
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Compiler and Microarchitectural Techniques for Leakage Power Reductiondownload دانلود ,ويدئو و اسلايد Video & Slide , از گروه Computer Sience & Engineering كامپيوتر و مهندسی كتابخانه اينترنتي دانش گستران جوان You Research Speaker(s) اجرا : Aviral Shrivastava, Assistant Professor, Department of Computer Science and Engineering, Arizona State University
Sarma Vrudhula
Runtime مدت زمان : 1:30:33
Video Size حجم ويدئو : 189 MB
Number of Slides تعداد اسلايد‌ها : 234 (17 MB)
Compiler and Microarchitectural Techniques for Leakage Power Reductiondownload دانلود ,ويدئو و اسلايد Video & Slide , از گروه Computer Sience & Engineering كامپيوتر و مهندسی كتابخانه اينترنتي دانش گستران جوان You Research
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